Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Fluid growth from gaseous state combined with preceding...
Reexamination Certificate
1999-09-29
2001-09-25
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Fluid growth from gaseous state combined with preceding...
Reexamination Certificate
active
06294443
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacturing of semiconductor components, and more specifically to the deposition by epitaxy of a silicon layer on a single-crystal silicon substrate.
2. Discussion of the Related Art
Generally, in the field of semiconductor component manufacturing, it is known to grow epitaxial layers of a determined conductivity type and doping level on substrates of a determined conductivity type, generally different from that of the epitaxial layer, and of a determined doping level. The epitaxy provides thin single-crystal layers having a controllable transversal doping level, conversely to methods needing a dopant diffusion step, in which the doping level decreases with the diffusion depth.
Vapor phase epitaxy methods, which have been developed for many years, yield very satisfactory results when the substrate doping level is homogenous and relatively low. However, in modern technologies, buried layers, that is, heavily-doped localized layers of the first and/or of the second conductivity type formed under the epitaxial layer, are more and more used. The buried layers are obtained by performing, in the substrate, a high dose implantation of a selected dopant before proceeding to the epitaxial growth. These layers are for example intended for forming bipolar transistor collectors and must be very heavily doped. This results in a known drawback, currently called selfdoping, which is that the implanted dopant has a tendency, during the epitaxy process, to dope the epitaxial layer above and beside the implanted region. The epitaxial layer then no longer has the desired resistivity. As the epitaxial layer becomes thinner, this disadvantage becomes more significant since the selfdoping phenomenon essentially occurs in the initial growth phase of this layer. Further, it obviously appears that the selfdoping rate of the epitaxial layer depends on the surface of the doped areas meant to become buried layers. The larger this surface area, the stronger the selfdoping. Thus, from one circuit to another, according to whether more or fewer buried layers have been made, the epitaxial layer will not have the same general resistivity. This phenomenon is difficult to master. It goes against what is aimed at in any industrial process, that is, obtaining controlled and repeatable results, which are, if possible, identical for different products of a given technology.
At the present time, many methods have been brought forward to attempt to solve selfdoping problems during deposition of a lightly-doped epitaxial layer on a substrate containing boron-implanted areas, or boron-implanted areas and arsenic-implanted areas. However, these methods have yielded more or less satisfactory results according to the operating conditions, and none has met with general approval up to now. Further, although some solutions have enabled reducing the boron selfdoping, they have worsened the selfdoping due to other dopants such as arsenic and, in the case where there are several types of dopant sources, the general result is not satisfactory.
SUMMARY OF THE INVENTION
Thus, the present invention aims at a method of epitaxial deposition of silicon on a silicon substrate in which, or above which, exist regions heavily doped with boron and possibly also with arsenic.
To achieve this and other objects, the present invention provides a method of vapor phase epitaxy deposition of silicon on a silicon substrate on or in which exist areas containing dopants at high concentration, among which is boron, while avoiding a selfdoping of the epitaxial layer by boron, including the steps of: a) optionally performing an initial anneal; b) performing an epitaxial deposition during a chosen time to obtain a desired general thickness; c) introducing a chlorinated gas, before the epitaxial deposition step, to etch the substrate across a small thickness, smaller than 100 nm.
According to an embodiment of the present invention, the chlorinated gas is HCl.
according to an embodiment of the present invention, the chlorinated gas is introduced during a limited time before the epitaxial deposition.
According to an embodiment of the present invention, the chlorinated gas is introduced during most of the initial anneal.
According to an embodiment of the present invention, the initial anneal is performed at a temperature on the order of 1100° C. and the epitaxial deposition is performed at a temperature on the order of 1050° C.
According to an embodiment of the present invention, the initial anneal is performed in the presence of hydrogen.
According to an embodiment of the present invention, the epitaxial deposition is performed in the presence of a boron source.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.
REFERENCES:
patent: 3192083 (1965-06-01), Sirtl
patent: 5308788 (1994-05-01), Fitch etal.
patent: 247 322 A1 (1987-07-01), None
French Search Report from French Patent application 98 12755, filed Oct. 7, 1998.
Dutartre Didier
Jerier Patrick
Christianson Keith
Galanthay Theodore E.
Morris James H.
STMicroelectronics S.A.
Wolf Greenfield & Sacks P.C.
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