Method of driving 1-transistor type DRAM having an NMOS...

Details Method of driving 1-transistor type DRAM having an NMOS... Method of driving 1-transistor type DRAM having an NMOS...

2008-07-03

2010-06-08

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S149000

Reexamination Certificate

active

07733725

ABSTRACT:
Driving a 1-transistor DRAM composed of an NMOS on top of a SOI layer such that the 1-transistor DRAM has a corresponding parasitic bipolar transistor component includes precharging, shifting, and deactivating steps. Implementing these steps can result in enhancing the performance of reading, writing and storing binary logic information within the 1-transistor DRAM memory device.

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patent: 7630262 (2009-12-01), Kang et al.
patent: 100800157 (2008-01-01), None
patent: 100800158 (2008-01-01), None
patent: 100861187 (2008-09-01), None
patent: 100861191 (2008-09-01), None

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