Method of detecting bit line bridge by selectively floating...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

07542328

ABSTRACT:
Provided is a bit line bridge detection method for selectively floating even-numbered or odd-numbered bit lines. The bit line bridge detection method simultaneously activates even-numbered sense amplifiers and odd-numbered sense amplifiers in response to a sense amplifier enable signal. The even-numbered sense amplifiers and the odd-numbered sense amplifiers are selectively disabled in response to a sense amplifier disable signal generated at a predetermined time after the sense amplifier enable signal is generated, and an even-numbered or odd-numbered sense amplifier selection signal which is stored in a mode register. As a result, the even-numbered bit lines and the odd-numbered bit lines are selectively floated. If data input to memory cells is inverted, a bit line bridge is detected.

REFERENCES:
patent: 5886939 (1999-03-01), Choi et al.
patent: 6396754 (2002-05-01), Lee et al.
patent: 7257013 (2007-08-01), Roehr
patent: 7474573 (2009-01-01), Shin
patent: 2004-039124 (2004-02-01), None
patent: 2002-0011213 (2002-02-01), None
patent: 2002-0064638 (2002-08-01), None
English language abstract of Korean Publication No. 2002-0011213.
English language abstract of Korean Publication No. 2002-0064638.
English language abstract of Japanese Publication No. 2004-039124.

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