Method of cleaning a copper/porous low-k dual damascene etch

Details Method of cleaning a copper/porous low-k dual damascene etch Method of cleaning a copper/porous low-k dual damascene etch

2000-07-24

2002-10-01

Gulakowski, Randy (Department: 1746)

Cleaning and liquid contact with solids

Processes

Including application of electrical radiant or wave energy...

C134S902000, C216S049000, C216S067000, C438S710000, C438S906000, C438S963000

Reexamination Certificate

active

06457477

ABSTRACT:

BACKGROUND OF THE INVENTION
After etching through a porous low-k material layer to form an opening exposing an underlying metal line, for example a copper line, the etched opening must be cleaned before filling the via with a conducting metal to form a metal interconnect. The opening may be, for example, a via opening, a trench opening, or a dual damascene opening.
The most common method of etching the low-k material involves depositing and patterning a photoresist layer over the low-k material. The patterned photoresist layer is used as a mask for the low-k material etch. The photoresist is removed by a high temperature ashing conducted at from about 35 to 45° C., and more preferably about 40° C.
In many cases, an etch stop layer, such as SiN, overlies the underlying metal line to signal the completion of etching of the low-k material and to protect the metal line. The opening is formed through the low-k material by conventional lithography and etching using the etch stop layer as a stop. This etch stop layer is first removed by etching, and then the opening is cleaned by a wet cleaning process to prepare for depositing a metal layer to fill the opening.
U.S. Pat. No. 5,946,589 to Ng et al. describes an in-situ photoresist removal and post clean (H
2
0
).
U.S. Pat. No. 6,006,764 to Chu et al. describes a 3 step PR strip.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a dry cleaning method for copper/porous low-k etches.
Another object of the present invention is to provide a copper/porous low-k etch cleaning method that prevents deterioration of the subsequent metallization process.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a semiconductor structure having an exposed device therein is provided. An etch stop layer is formed over the semiconductor structure and the exposed device. A layer of low-k material is formed over the etch stop layer semiconductor structure and device. A patterned layer of photoresist is formed over the low-k material layer. The patterned photoresist layer is used as a mask to etch low-k material layer is etched to form an opening exposing at least a portion of the etch stop layer over the device. The patterned photoresist layer is removed by a low temperature ashing process at a temperature from about 23 to 27° C. and more preferably about 25° C. (room temperature). The exposed portion of the etch stop layer over the device is removed to expose the underlying device by a low pressure, low bias etching process at a pressure from about 8 to 12 milli-Torr and a bias power from about 25 to 35 W. The exposed underlying device and the opening are cleaned by removing any remaining low pressure, low bias etch polymer and etch residue by a fully dry-type cleaning process using an H
2
He gas.


REFERENCES:
patent: 5946589 (1999-08-01), Ng et al.
patent: 6006763 (1999-12-01), Mori et al.
patent: 6006764 (1999-12-01), Chu et al.
patent: 6313042 (2001-11-01), Cohen et al.

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