Method of attaching a die to a substrate

Details Method of attaching a die to a substrate Method of attaching a die to a substrate

2002-03-04

2004-09-28

Thai, Luan (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Die bond

C257S666000, C257S676000, C257S787000

Reexamination Certificate

active

06798074

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to integrated circuits and a method of packaging integrated circuits and, more particularly, to a method of attaching a die to a substrate.
An integrated circuit (IC) die is a small device formed on a semiconductor wafer, such as a silicon wafer. Such a die is typically cut from the wafer and attached to a substrate or base carrier for interconnect redistribution. Bond pads on the die are then electrically connected to the leads on the carrier via wire bonding. The die and wire bonds are encapsulated with a protective material such that a package is formed. The leads encapsulated in the package are redistributed in a network of conductors within the carrier and end in an array of terminal points outside the package. Depending on the package type, these terminal points may be used as-is, such as in a Thin Small Outline Package (TSOP), or further processed, such as by attaching spherical solder balls for a Ball Grid Array (BGA). The terminal points allow the die to be electrically connected with other circuits, such as on a printed circuit board. IC die can also be attached to other die to form a stacked multichip device.
Referring now to
FIG. 1
, an enlarged side view of a conventional TSOP
10
is shown. The TSOP
10
includes an integrated circuit or die
12
attached to a paddle
14
with an adhesive material layer
16
. The integrated circuit
12
is electrically connected to pins
18
of a leadframe with wirebonds
20
. The circuit
12
, paddle
14
, and wirebonds
20
are encapsulated, such as with a molded plastic
22
.
The conventional die attach method covers the paddle
14
with an amount of adhesive material
16
that matches the exact die size only. Thus, as shown in
FIG. 2
, when the integrated circuit
12
is pressed onto the adhesive material
16
, the adhesive material
16
only extends beyond the die size by a distance that is equal to about the height of the die or integrated circuit
12
.
FIG. 3
is a top plan view of the integrated circuit
12
attached to the paddle
14
with the adhesive material
16
. As can be seen, there is a large portion of the paddle
14
that is not covered by either the integrated circuit
12
or the adhesive material
16
.
Some devices are packaged using an exposed pad (EP) design in order to enhance heat dissipation and improve certain electrical characteristics. In an exposed die attach pad design, the die attach pad is soldered directly onto the PCB. That is, the die is attached directly to a metal paddle, which is directly soldered to the PCB. However, special care must be taken when handling and soldering these EP packages. Such EP packages must be handled in a dry environment prior to soldering and exposure to moisture must be minimized prior to assembly to ensure reliable performance. The coverage of the adhesive material
16
during the die attach process is critical to field operation reliability. Voids and variations in thickness of the adhesive material
16
are undesirable. Further, insufficient coverage of the die attach material
16
makes the device susceptible to reliability failures, due to, for example, delamination. Moisture buildup in the die attach adhesive can also cause delamination. The aforedescribed die attach method only marginally achieves Moisture Sensitive Level Three (MSL-3) at 240° C. reflow condition.
It would be desirable to be able to attach a die to a paddle, substrate or carrier with an adhesive such that the device is less sensitive to moisture and more reliable.


REFERENCES:
patent: 5122860 (1992-06-01), Kikuchi et al.
patent: 6265530 (2001-07-01), Herr
patent: 2001/0012680 (2001-08-01), Cobbley
patent: 2002/0182774 (2002-12-01), Heckman
National Semiconductor Corporation, Semiconductor Packaging Assembly Technology, Aug. 1999.
National Semiconductor Corporation, Plastic Package Moisture-Induced Cracking, Aug. 1999.
Ruihua Han, Linhuo Shi, and Mahesh Gupta, Three-Dimensional Simulation of Microchip Encapsulation Process, Department of Mechanical Engineering-Engineering Mechanics, Michigan Technological University, Houghton, Michigan 49931.

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