Method of and system for analyzing cells of a memory device

Details Method of and system for analyzing cells of a memory device Method of and system for analyzing cells of a memory device

2006-02-21

2006-02-21

Bui, Bryan (Department: 2863)

Data processing: measuring, calibrating, or testing

Measurement system

Performance or efficiency evaluation

C702S118000, C714S732000

Reexamination Certificate

active

07003432

ABSTRACT:
A method of analyzing cells of a memory device is disclosed. Generally, a plurality of fail signatures is generated, wherein each fail signature is associated with a type of failure. Voltages according to a plurality of test patterns are applied to nodes of a cell of the memory device. Fail data of the cell for the plurality of patterns is then analyzed, and a fail signature of the cell is determined. A type of failure of the cell based upon the plurality of fail signatures is then determined. A system for analyzing cells of a memory device is also disclosed. The system generally includes a plurality of probes applying different voltages to a cell of the memory device. A control circuit varies the voltages applied to the cell, and compares the failures of the cell as the test voltage applied to the cell is varied to an artificial bit map. Finally, an output device generates an output indicating a type of failure of the cell.

REFERENCES:
patent: 5901105 (1999-05-01), Ong et al.
patent: 6330697 (2001-12-01), Clinton et al.
patent: 6650583 (2003-11-01), Haraguchi et al.

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