Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-11-29
2005-11-29
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S230000, C438S303000, C438S305000
Reexamination Certificate
active
06969646
ABSTRACT:
A process sequence used to integrate an anneal cycle, used to activate ion implanted dopants in a polysilicon gate structure, and the definition of offset silicon oxide spacers on the sides of the polysilicon gate structure, has been developed. The process sequence features ion implantation of dopants into a blanket polysilicon layer located overlying a metal oxide semiconductor field effect transistor (MOSFET), gate insulator layer. After definition of the polysilicon gate structure a silicon oxide layer is deposited, followed by an anneal procedure allowing activation of the implanted dopants in the polysilicon gate structure to occur. Out diffusion of implanted dopants during the activation anneal procedure is minimized as a result of the overlying silicon oxide layer. An anisotropic dry etching procedure is then performed on the silicon oxide layer resulting in the definition of offset silicon oxide spacers on the sides of the polysilicon gate structure.
REFERENCES:
patent: 5021354 (1991-06-01), Pfiester
patent: 5573965 (1996-11-01), Chen et al.
patent: 6063698 (2000-05-01), Tseng et al.
patent: 6144071 (2000-11-01), Gardner et al.
patent: 6156602 (2000-12-01), Shao et al.
patent: 6157063 (2000-12-01), Iiboshi
patent: 6187645 (2001-02-01), Lin et al.
patent: 6235600 (2001-05-01), Chiang et al.
patent: 6248623 (2001-06-01), Chien et al.
patent: 6277683 (2001-08-01), Pradeep et al.
patent: 6316302 (2001-11-01), Cheek et al.
patent: 6352900 (2002-03-01), Mehrotra et al.
patent: 6362062 (2002-03-01), Nandakumar
patent: 6383881 (2002-05-01), Akram et al.
patent: 6436747 (2002-08-01), Segawa et al.
patent: 6468915 (2002-10-01), Liu
patent: 6534388 (2003-03-01), Lin et al.
patent: 6562676 (2003-05-01), Ju
patent: 2002/0102802 (2002-08-01), Tan et al.
patent: 2002/0160553 (2002-10-01), Yamanaka et al.
patent: 2003/0124824 (2003-07-01), Mehrotra et al.
Benistant Francis
Quek Elgin
Ackerman Stephen B.
Chartered Semiconductor Manufacturing Ltd.
Duong Khanh
Pike Rosemary L. S.
Saile George O.
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