Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-04-05
2005-04-05
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C716S030000, C716S030000
Reexamination Certificate
active
06877120
ABSTRACT:
The method of acquiring scan chain reorder information performs scan composition on the basis of a net list before the scan composition and acquires two or more pieces of information from a group consisting of an information which defines a start point and an end point of the scan chain, an information which defines an order of cells on the scan chain, and a unique name and a terminal name of each cell, an information which defines a clock domain and a polarity of a scan flip-flop on the scan chain, and an information which defines scan chain reorder enabling/disabling information.
REFERENCES:
patent: 5748497 (1998-05-01), Scott et al.
patent: 6256770 (2001-07-01), Pierce et al.
patent: 6405355 (2002-06-01), Duggirala et al.
patent: 10-198717 (1998-07-01), None
patent: 11-203105 (1999-07-01), None
patent: 2000-55986 (2000-02-01), None
patent: 2000-137741 (2000-05-01), None
Fujitsu Limited
Staas & Halsey , LLP
Tu Christine T.
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