Method for writing data in testing memory device and circuit for

Details Method for writing data in testing memory device and circuit for Method for writing data in testing memory device and circuit for

1992-01-29

1993-03-23

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365203, 36518905, 371 24, G11C 1300

Patent

active

051970317

ABSTRACT:
A circuit for testing a memory device includes a data writing circuit, a data checking circuit, and a control circuit. A method for writing data in testing the memory device comprises the steps of generating a voltage difference between a pair of bit lines B/L and B/L, and storing directly data corresponding to the voltage difference in a capacitor of a memory cell. Direct writing of data on the bit lines is performed. Moreover, each memory cell is totally checked during one cycle, and the test time is greatly reduced.

REFERENCES:
patent: 4670878 (1987-06-01), Childers
patent: 4815040 (1989-03-01), Matsui et al.

Affiliated with

Also associated with

Rating

Method for writing data in testing memory device and circuit for does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for writing data in testing memory device and circuit for, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for writing data in testing memory device and circuit for will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1357359