Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-09-14
1999-03-23
Kunemund, Robert
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438263, 438266, 438269, 438430, 438478, 438488, 148DIG14, 148DIG122, 148DIG138, H01L 2120
Patent
active
058858695
ABSTRACT:
A method is disclosed for uniformly doping HSG polycrystalline silicon independent of the other layers of the semiconductor substrate. A semiconductor substrate having a silicon dioxide layer formed superjacent a polysilicon layer is provided in a chamber. A doped rough silicon layer is formed in situ superjacent the silicon dioxide layer. This is accomplished by depositing the silicon layer superjacent the silicon dioxide layer and exposing the silicon layer to a source gas, a dopant gas, and energy, preferably in situ to thereby form uniformly doped silicon layer and roughened polysilicon layer using rapid thermal chemical vapor deposition techniques or low pressure chemical vapor deposition.
Alternatively, a uniformly doped roughened polysilicon layer is formed superjacent the silicon dioxide layer in situ. This formation is achieved by depositing an amorphous silicon layer superjacent the silicon dioxide layer and roughening the amorphous silicon layer in situ. The step of roughening is achieved by vacuum annealing the amorphous silicon layer using rapid thermal chemical vapor deposition techniques or low pressure chemical vapor deposition. The roughened amorphous silicon layer is doped by exposing to a source gas, a dopant gas and energy.
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Thakur Randhir P. S.
Turner Charles
Kunemund Robert
Micro)n Technology, Inc.
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