Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-12-02
2001-07-10
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S479000, C438S706000, C438S694000, C438S974000, C438S759000, C438S758000
Reexamination Certificate
active
06258637
ABSTRACT:
FIELD OF THE INVENTION
This invention pertains generally to semiconductor fabrication methods and more specifically to the surface preparation, surface cleaning, and deposition of thin films on silicon.
BACKGROUND OF THE INVENTION
Microelectronic circuits are typically fabricated on single-crystal silicon substrates. Fabrication of such circuits requires that several different materials, deposited or grown as thin films, contact the silicon substrate in precise patterns. For example, a field effect transistor formed on a silicon substrate requires an insulating gate dielectric thin film overlying the channel region of the transistor, and may also require a film forming several conductive contacts to the substrate on opposite sides of this channel region.
The microelectronics industry continually strives to increase performance, decrease power consumption, and decrease per-unit costs of microelectronic circuits. To realize these goals, each new generation of circuits typically integrates smaller devices onto the silicon substrate than its predecessors did, including in many cases thinner films contacting the silicon substrate. Miniaturization of devices is now approaching the level where the quality of the interface between the substrate and a deposited film, on an atomic scale, becomes significant.
SUMMARY OF THE INVENTION
It has now been found that one of the critical issues for continued miniaturization of microelectronic circuits is the uniformity of the ultrathin films used as gate dielectrics. For example, where SiO
2
is used as a gate dielectric with a thickness less than about 3 nm, the roughness of the atomic interface between a silicon substrate and the overlying SiO
2
layer may greatly affect device reliability and performance. Even a small amount of nonuniformity at this interface, on the order of 0.1 nm, may significantly reduce gate dielectric breakdown field and carrier mobility in the devices.
It has also now been found that present low-temperature methods for thin film formation typically produce nonuniform atomic-level interfaces at low temperature. For example, the acid etching step normally performed just prior to film deposition leaves an unstepped silicon surface with an rms roughness of about 0.4 nm. Other surface preparation methods, such as thermal desorption of a native oxide at low temperature (e.g. 800° C.), produce pinholes several nanometers deep and ranging in size up to about half a micron wide. In contrast, the present invention may be used at temperatures less than 800° C. to form a prepared surface with no pinholes, a measured rms roughness as low as 0.05 nm, and a surface structure similar to that formed with a high temperature (1200° C.) anneal step.
The present invention comprises a low temperature process for preparing a silicon surface for subsequent growth of a thin film which has an atomically flat and uniform interface with the underlying silicon substrate. This process may comprise the step of forming an oxidized silicon layer on a region of a single-crystal silicon substrate, or providing such a substrate with a pre-existing oxidized silicon layer. This process further comprises placing the substrate in a vacuum, and then providing a silicon-containing flux to the substrate at a flux which is insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, but is sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. This flux is continued until the oxidized silicon layer is removed from the substrate region. A thin film of a desired composition may then be deposited or grown on the resulting atomically flat, single atomic-height stepped silicon surface, preferably without breaking the vacuum.
In the simplest embodiment, the oxidized silicon layer is a native oxide layer, but the oxidized silicon layer may also be purposely grown. The silicon-containing flux is preferably supplied in a temperature range of about 640° C. to 1050° C., and is preferably started at or before the substrate reaches a temperature of about 780° C. In one embodiment, the silicon-containing flux is supplied to the substrate by a physical vapor deposition technique, e.g. sputtering or evaporation. In an alternate embodiment, the silicon-containing flux is supplied to the substrate by a chemical vapor deposition method.
The present invention finds application in the deposition of: gate dielectrics, e.g. silicon dioxide, silicon nitride, tantalum pentoxide, titanium dioxide, barium titanate, strontium titanate, bismuth titanate, and combinations thereof; other insulating films; conducting films, e.g. metal, metal silicides, and polysilicon; semiconducting films; and tunnel barriers associated with Si-based resonant tunneling devices. The present invention has particular application to the deposition of films on substrates having microelectronic devices partially formed thereon, since the method produces an extremely smooth interface between the film and the substrate without requiring a high temperature anneal step.
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Wallace Robert M.
Wei Yi
Wilk Glen D.
Brady III Wade James
Denker David
Jones Josetta I.
Niebling John F.
Telecky , Jr. Frederick J.
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