Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With pretreatment or preparation of a base
Reexamination Certificate
2001-05-24
2003-10-07
Utech, Benjamin L. (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Forming from vapor or gaseous state
With pretreatment or preparation of a base
C117S094000, C117S090000, C117S097000, C117S935000
Reexamination Certificate
active
06630024
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front.
2. The Prior Art
According to the prior art, epitaxially grown semiconductor wafers are produced from suitable intermediate products by the process sequence of abrasive polishing—finish polishing—cleaning—epitaxy. The surface roughness after the abrasive polishing, is measured using the atomic force microscope (AFM) method in an area of 1 &mgr;m by 1 &mgr;m, being from about 0.5 to 3 nm RMS (root-mean-square), depending on the processing conditions, and being from about 0.05 to 0.2 nm RMS after the finish polishing.
EP 711 854 A1 describes a method for the production of an epitaxially grown wafer, in which a sawn—lapped—etched silicon wafer is abrasively polished. A surface roughness of from 0.3 to 1.2 nm RMS (AFM, 1 &mgr;m by 1 &mgr;m) is created and, to reduce costs, an epitaxial silicon layer is deposited without carrying out a smoothing finish polishing step. Although the epitaxy layer produced in this way is comparable, in terms of its electrical properties, with an epitaxy layer produced conventionally with prior use of a finish polishing step, there is a higher incidence of localized light scatterers (LLS) on the epitaxially grown surface. This is due to the relatively high initial roughness, and potentially leads to increased rejection of components produced on these wafers.
It is also known that defects in the substrate wafer, which can be detected as oxide precipitates, after the deposition of the epitaxial layer cause an increased number of localized light scatterers. EP-959154 A1 describes heat treatment of the substrate wafer, which precedes the epitaxial deposition and reduces the number of near-surface defects. It has been found, however, that the reduction which can be achieved in this way, especially when using substrate wafers in which a large number of such defects can be detected, is insufficient or entails high costs. The efficiency of the defect reduction depends on the length of the heat treatment. When the heat treatment is carried out only to an extent for which the associated costs remain at a tolerable level, an undesirably high number of localized light scatterers is found on the epitaxially grown surface.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method which leads to an epitaxially grown semiconductor wafer that does not exhibit these disadvantages in terms of roughness and the number of localized light scatterers on the epitaxially grown surface, and which is also suitable for the use of semiconductor wafers having defects that can be detected as oxide precipitates.
Another object of the present invention is to provide a wafer in which the other properties of the epitaxially grown semiconductor wafer are at least as good as those of epitaxially grown semiconductor wafers produced according to the prior art.
The above objects are achieved according to the present invention which relates to a method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, which comprises the following process steps:
(a) preparing a substrate wafer having a polished front and a specific thickness;
(b) pretreating the front of the substrate wafer in the presence of HCl gas and a silane source at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor, the thickness of the substrate wafer remaining substantially unchanged; and
(c) depositing the epitaxial layer on the front of the pretreated substrate wafer.
The method of the invention makes it possible to obtain a semiconductor wafer in which the surface of the epitaxial layer has a maximum density of 0.14 localized light scatterers per cm
2
with a scattering cross section of greater than or equal to 0.12 &mgr;m. Before the epitaxial layer is deposited, the front of the substrate wafer has a surface roughness of from 0.05 to 0.2 nm RMS, measured by AFM or a 1 &mgr;m by 1 &mgr;m large reference area. The semiconductor wafer is suitable for use in the semiconductor industry, especially for the fabrication of electronic components having linewidths equal to or less than 0.18 &mgr;m.
Regarding step (a) of the process sequence according to the invention:
To produce the epitaxially grown semiconductor wafer according to the invention, a substrate wafer which, after separation from a crystal, has been, for example, lapped and etched or ground and etched or only ground, or is only in the sawn state. This substrate wafer is then subjected to an abrasive polish and optionally a finish polish finishing), the polish being carried out either on both sides at the same time or only on the front of the substrate wafer. A suitable polishing process for substrate wafers polished on two sides is described, for example, in DE-199 05 737 C1. The substrate wafer may be low in defects or affected by defects which can be detected as large near-surface oxide precipitates or as oxide-filled voids.
According to a preferred embodiment of the invention which, in particular, is preferred with regard to low costs, in step (a) of the method a substrate wafer having a polished front is prepared, for whose production only a single polishing step, i.e. an abrasive polish, is used. No finish polish is employed. The substrate wafer is removed from the polishing machine and is subjected to cleaning and drying according to the prior art. The cleaning may be implemented either as a batch method, with the simultaneous cleaning of a plurality of substrate wafers in baths, or by spraying methods, or alternatively as a single-wafer process.
According to a further, preferred embodiment of the invention, a polished substrate wafer is prepared in step (a) which is rich in defects that can be detected as large near-surface oxide precipitates or as oxide-filled voids. Such a substrate wafer lies within the scope of the invention if the density of defect seeds in at least one region of the substrate wafer, according to OSF testing (conditions: wet oxidation at 1100° C. for 2 hours with subsequent Secco treatment for 3 minutes (doping: p−) or wet oxidation at 1100° C. for 2 hours with subsequent Wright treatment for 3 minutes (doping: p+)), reaches a value of least 5/cm
2
(near-surface oxide precipitates) or, after 20 min of non-shaken Secco treatment, at least 2 &mgr;m large Secco etch pits and/or large pits with a density of at least 0.05/cm
2
(oxide-filled voids) are found in the void-rich region of the wafer. This is generally the case if the oxygen concentration is in the range of from 3*10
17
to 9*10
17
atoms of oxygen cm
−3
, preferably from 5*10
17
to 7.5*10
17
atoms of oxygen cm
−3
, and the concentration is determined according to the American ASTM standard, and at least one of the following conditions is satisfied with respect to dopants and their concentrations in the substrate wafer.
The nitrogen concentration is in the range of from 1*10
10
to 5*10
15
atoms of nitrogen cm
−3
, preferably from 5*10
12
to 5*10
15
atoms of nitrogen cm
−3
. The carbon concentration is in the range of from 1*10
15
to 5*10
17
atoms of carbon cm
−3
, preferably from 1*10
16
to 5*10
17
atoms of carbon cm
−3
. The boron concentration is in the range of more than 5*10
17
atoms of boron cm
−3
. The described category of substrate wafers affected by defects includes, in particular, silicon wafers on which an annular buildup of defect seeds, a so-called OSLO ring, car be A detected (OSF=oxidation induced stacking fault) and silicon wafers which have a high density of oxide-filled voids in the crystal (M. Hourai et al. in
The Electrochem. Soc.
PV98-1 (1998), page 453 and G. Kissinger et al. in
Appl. Phys. Lett.
(1998), page 223).
The substrate wafer affected by defects can also have been prepared in an only abrasively polished state,
Gräf Dieter
Messmann Klaus
Obermeier Günther
Schauer Reinhard
Schmolke Rüdiger
Collard & Roe P.C.
Song Matthew J
Utech Benjamin L.
Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
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