Method for the fabrication of a DMOS transistor

Details Method for the fabrication of a DMOS transistor Method for the fabrication of a DMOS transistor

2005-02-08

2005-02-08

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S335000

Reexamination Certificate

active

06852598

ABSTRACT:
A method for the fabrication of a DMOS transistor structure provides the advantage that, through the use of a protective layer, the DMOS transistor structure, which has already been substantially completed, is protected from the adverse effects of further process steps. The DMOS gate electrode is not, as is customary in the prior art, patterned using a single lithography step, but, rather, the patterning of the DMOS gate electrode is split between two lithography steps. In a first lithography step, substantially only the source region of the DMOS transistor structure is opened. Therefore, the electrode layer that is still present can be used as a mask for the subsequent fabrication of the body region.

REFERENCES:
patent: 5382536 (1995-01-01), Malhi et al.
patent: 5430316 (1995-07-01), Contiero et al.
patent: 5739061 (1998-04-01), Kitamura et al.
patent: 5913114 (1999-06-01), Lee et al.
patent: 6268626 (2001-07-01), Jeon
patent: 6492678 (2002-12-01), Hebert

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