Method for the erasure of a static RAM and corresponding integra

Details Method for the erasure of a static RAM and corresponding integra Method for the erasure of a static RAM and corresponding integra

1998-02-27

2000-08-22

Dinh, Son T.

Static information storage and retrieval

Systems using particular element

Flip-flop

365194, 365218, G11C 1100

Patent

active

061082325

ABSTRACT:
In a static RAM, a complete erasure of the memory is achieved by sequentially propagating an erasure control signal from one group of memory cells to a next group of memory cells through delay circuits calibrated to correspond to a maximum time duration of erasure of the previous group of cells.

REFERENCES:
patent: 4858182 (1989-08-01), Pang et al.
patent: 4879686 (1989-11-01), Suzuki et al.
patent: 4928266 (1990-05-01), Abbott et al.
patent: 4949308 (1990-08-01), Araki et al.
patent: 5054000 (1991-10-01), Miyaji
French Search Report from French Patent Application 97 02454, filed Feb. 28, 1997.

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