Method for testing storage apparatus and system thereof

Details Method for testing storage apparatus and system thereof Method for testing storage apparatus and system thereof

2011-05-24

2011-05-24

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S718000, C714S719000, C714S703000, C714S704000, C714S042000, C714S705000, C365S201000

Reexamination Certificate

active

07949911

ABSTRACT:
A method for testing a storage apparatus, which includes: (a) writing a specific pattern to a storage unit of a storage apparatus; (b) reading the specific pattern written to the storage apparatus; (c) determining an error bit number of the specific pattern read in the step (b); and (d) determining that the storage unit has defect when the error bit number is larger than a error bit threshold value, wherein the error bit threshold value is smaller than a correctable bit number for a error correction code corresponding to the specific pattern.

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Sexton, F.W.; Hash, G.L.; Connors, M.P.; Murray, J.R.; Schwank, J.R.; Winokur, P.S.; Bradley, E.G.; SEU and SEL response of the Westinghouse 64K E2PROM, Analog Devices AD7876 12-bit ADC, and the Intel 82527 serial communications controller,Jul. 20, 1994,Radiation Effects Data Workshop, 1994 IEEE, on p. 55-63.

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