Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2006-07-11
2006-07-11
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
Reexamination Certificate
active
07076699
ABSTRACT:
A method for testing semiconductor devices advantageously increases manufacturing yields. The method includes generating memory repair data for a wafer die by writing at least one predetermined digital bit pattern into a memory on the wafer die, reading the at least one predetermined digital bit pattern back out of the memory, comparing the at least one predetermined digital bit pattern read out from the memory against the at least one predetermined digital bit pattern written into the memory, and storing results of the comparison as the memory repair data. The writing and reading are performed a plurality of times, each time with a different voltage and clock frequency combination being applied to the wafer die. The memory repair data is programmed into the wafer die, and the wafer die is assembled into a packaged semiconductor device. The packaged semiconductor device is tested by causing the memory repair data programmed within the packaged semiconductor device to be transferred into the memory a plurality of times, each time with a different voltage and clock frequency combination being applied to the packaged semiconductor device.
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Agrawal Ghasi R.
Puri Mukesh K.
Schwarz William
Kerveros James C.
Maginot, Moore & Beck LLC
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