Method for testing data retention in a static random access memo

Details Method for testing data retention in a static random access memo Method for testing data retention in a static random access memo

1997-08-05

1999-06-08

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Testing

365226, G11C 700

Patent

active

059109220

ABSTRACT:
A circuit and a method for providing a power supply voltage to a memory circuit during a memory data retention test are provided. In such a circuit, a first power supply terminal and a second power supply terminal are provided together with a plurality of circuit elements, which are coupled to form a current path between the first and second power supply terminals, such that each circuit element contributes a predetermined voltage drop between the first and second power supply terminals when a current flows in said current path. In addition, a shunt device having a control terminal and coupled across one or more of said circuit elements is provided. The control terminal receives a control signal, such that when the control signal is asserted, the shunt device equalizes a voltage across said one or more of said circuit elements. The memory circuit draws its power supply voltage from the second power supply terminal.

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