Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2008-07-29
2008-07-29
Zarneke, David A (Department: 2891)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C257SE21528, C257SE21530, C257SE21531
Reexamination Certificate
active
07405091
ABSTRACT:
The present invention is a method for testing a contact open capable of effectively testing a contact open defect in an In-line as securing a mass productivity. The method includes the steps of: performing a photolithography process for forming a contact; forming a contact hole by performing a contact etching process after sampling at least one wafer; depositing a conductive layer on the wafer provided with the contact hole; isolating the conductive layer within the contact hole; performing a test for testing a contact open interface to check whether a remaining layer is existed in an interface between the conductive layer and a lower structure of the conductive layer; and performing a process for etching the contact of a main lot based on a test result.
REFERENCES:
patent: 05129389 (1993-05-01), None
patent: 05259240 (1993-10-01), None
patent: 10-0217327 (1999-06-01), None
patent: 2001-0052044 (2001-06-01), None
patent: 2002-0077016 (2002-10-01), None
Quirk et al., Semiconductor Manufacturing Technology, 2001, Prentice-Hall, p. 515.
Full English translation of Kuroki, JP 05129389A.
Jung Tae-Woo
Lee Min-Suk
Lee Sung-Kwon
Blakely , Sokoloff, Taylor & Zafman LLP
Hynix / Semiconductor Inc.
Zarneke David A
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