Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2005-02-03
2010-12-28
Tsai, Sheng-Jen (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C711SE12089
Reexamination Certificate
active
07861059
ABSTRACT:
A method and system are provided for programming a plurality of memory devices arranged in parallel. In one embodiment of the present invention, the plurality of memory devices comprises first and second memory devices, and the method comprises providing successively the first address to the first memory device and the second address to the second memory device. The first address refers to a first group of storage locations in the first memory device and the second address refers to a second group of storage locations in the second memory device. The method then proceeds to load in parallel a string of data to the first and second memory devices so that the string of data is written simultaneously to the first group of storage locations in the first memory device and to the second group of storage locations in the second memory device.
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Greene Richard Mark
Holmes John M.
Kim Young Cheol
Magliocco Paul
Dorsey & Whitney LLP
Nextest Systems Corporation
Tsai Sheng-Jen
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