4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Paul Magliocco

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Apparatus having pattern scrambler for testing a...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method for testing and programming memory devices and system...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Semiconductor test system having double data rate pin...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2789129

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