Method for synchronizing a first clock to a second clock,...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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C713S401000, C713S500000, C713S501000, C713S502000, C713S503000

Reexamination Certificate

active

10472821

ABSTRACT:
The invention relates to a method for synchronizing a first clock C to a reference clock A, the first clock C being connected to said reference clock A via a processing unit B. The invention moreover relates to a processing unit B and to a synchronization system. In order to enable a synchronization of said first clock C to said reference clock A via said processing, unti B. it is proposed that the processing unit B generates a correction message cmsg for the first clock C based on timestamps exchanged between the processing unit B and the reference clock A, which exchanged of timestamps is triggered by clock pulses cclk received in the processing unit B from the first clock C.

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patent: 6125368 (2000-09-01), Bridge et al.
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patent: 6236971 (2001-05-01), Stefik et al.
patent: 6449291 (2002-09-01), Burns et al.
patent: 6747996 (2004-06-01), Holloway et al.
patent: 6898642 (2005-05-01), Chafle et al.

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