Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Patent
1998-09-11
2000-09-05
Lee, Thomas C.
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
713201, G06F 112, G06F 1300, H04L 700
Patent
active
061158259
ABSTRACT:
A method for distributing synchronization in an optical communications network is disclosed. In order to keep costs to a minimum, the method consists of deploying requisite primary reference source (PRS) clocks only at those sites having access to more or less than two independent synchronization distribution paths (SDPs). PRS clocks are also preferably installed at sites located substantially far from a site already equipped with a PRS clock. As a result, a small number of PRS clocks end up being installed, leading to substantial cost savings for the telecommunications service provider. Subsequently, a building integrated timing supply (BITS) system is deployed at all sites comprising more than one network element. The BITS has two timing inputs, a primary and a secondary timing reference, selected from two of the accessible SDPs. Synchronization status messaging (SSM) is then enabled at selected network elements in order to prevent the occurrence of timing loops while the number of network elements that need to be equipped with SSM by appropriately choosing which SDPs are used for the primary and secondary timing references.
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Barsetti Sarto
Bruce-Payne Geoff A.
Green Michael J.
Laforge Vallier Maurice
Lee Thomas C.
Nortel Networks Corporation
Omar Omar A.
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