Method for SONOS EFLASH integrated circuit

Details Method for SONOS EFLASH integrated circuit Method for SONOS EFLASH integrated circuit

2006-04-18

2006-04-18

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S954000

Reexamination Certificate

active

07029976

ABSTRACT:
A method of manufacturing a charge storage layer for a SONOS memory device. A feature of the embodiment is the first gate layer is formed over the charge storing layer (ONO) before the charge storing layer is patterned. The first gate layer protects the charge storing layer (ONO) from various etches used in the process to pattern the various gate dielectric layers on other regions of substrate.

REFERENCES:
patent: 6555436 (2003-04-01), Ramsbey et al.
patent: 6730564 (2004-05-01), Ramsbey et al.
patent: 6780708 (2004-08-01), Kinoshita et al.
patent: 6835662 (2004-12-01), Erhardt et al.
patent: 2002/0192910 (2002-12-01), Ramsbey
patent: 2004/0009645 (2004-01-01), Yoo
patent: 2004/0014289 (2004-01-01), Wu

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