Method for self-test and self-repair in a multi-chip package...

Details Method for self-test and self-repair in a multi-chip package... Method for self-test and self-repair in a multi-chip package...

2011-05-03

2011-05-03

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S733000

Reexamination Certificate

active

07937631

ABSTRACT:
A method and apparatus for operating a component including a memory device. The method includes receiving a plurality of commands and determining if a set of the plurality of commands matches a predefined pattern of commands configured to place the memory device into a test mode. Upon determining that the set of the plurality of commands matches the predefined plurality of commands, the memory device is placed in the test mode.

REFERENCES:
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patent: 6256240 (2001-07-01), Shinozaki
patent: 6988230 (2006-01-01), Vermeulen et al.
patent: 7213188 (2007-05-01), Louie et al.
patent: 7565586 (2009-07-01), Thompson
patent: 2007/0168780 (2007-07-01), Janzen

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