Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-29
2005-03-29
Chaudhurl, Olik (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S245000, C438S246000, C438S247000, C438S249000, C438S386000, C438S389000, C438S392000
Reexamination Certificate
active
06872621
ABSTRACT:
A method for removal of hemispherical grained silicon (HSG) in a deep trench is described. A buried silicon germanium (SiGe) layer serving as an etch stop layer is formed in the collar region of the trench, followed by depositing a HSG layer. The HSG layer is then successfully striped by wet etching with a potassium hydroxide/propanone/water etchant, that is, without damage to the trench sidewalls, since a good etch rate selectivity between the HSG layer and the SiGe layer is obtained by the wet etchant. In addition, no etch stop layer exists between the HSG layer and the bottom of the trench when manufacturing trench capacitors in accordance with the method; capacitance degradation is therefore not of concern.
REFERENCES:
patent: 6177696 (2001-01-01), Bronner et al.
patent: 20040079979 (2004-04-01), Lee et al.
Brewster William M.
Chaudhurl Olik
Pro-Techtor Inter-national Services
Promos Technologies Inc.
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