Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-01-18
2001-07-31
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06268256
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for reducing short channel effect, and more particularly to a method for forming pocket regions in a metal-oxide-semiconductor transistor.
2. Description of the Prior Art
Referring to
FIG. 1
, a schematic representation of the structure for a conventional MOS (metal-oxide-semiconductor) transistor with a pocket region formed therein. In
FIG. 1
, a substrate
100
is provided with a gate oxide layer
122
and a gate electrode
130
formed thereon, and spacers
124
are formed on the sidewalls of the gate oxide layer
122
and the gate electrode
130
. Moreover, LDD (Lightly-Doped Drain) regions
115
are formed under the spacers
124
, and a channel region
112
is formed between the LDD regions
115
. Source/drain regions
117
are formed on the other sides of the LDD regions
115
, and an APT (anti-punch-through) region
113
is formed between the source/drain regions. The conductivity type of the source/drain regions
117
is the same as the LDD regions
115
, and the conductivity type of the channel region
112
is the same as the APT region
113
which is opposite to the source/drain regions'. When the scale of gate shrinks, the distance between the source and drain is shorter so that the short channel effect takes place. A conventional method for solving this effect is to form pocket regions
116
between the APT region
113
and the source/drain regions
117
, in which the conductivity type of the pocket regions
116
is the same as the APT region
113
.
For the deep sub-micron device, how to decrease the short channel effect to prevent threshold voltage rolling-off is an important issue. A conventional method is to increase the concentration of the pocket region to generate the reverse short channel effect to increase the threshold voltage. However, the increased concentration of the pocket region will increase the resistant of the LDD regions, and then the Idsat as well as the driving current of the device decrease.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming pocket regions in a semiconductor transistor that substantially does not increase the resistant of LDD regions and which will decrease the short channel effect.
In one embodiment, a method for forming a metal-oxide-semiconductor transistor is provided. The method includes providing a substrate of a first conductivity type, and then forming a channel region and an anti-punch-through region of the first conductivity type in said substrate, in which the channel region is at the top of the substrate and the anti-punch-through region is under the channel region. Then, a gate is formed on the substrate. As a key step of this invention, silicon is implanted at a region between the anti-punch-through region and a pre-defined source/drain region for forming a point defect region under the lightly-doped drain region. Then, the substrate is annealed such that the dopant in the anti-punch-through region diffuses into the point defect region. Next, a lightly-doped-drain region of a second conductivity type is formed where the second conductivity type is opposite to the first conductivity type. Then, a conformal dielectric layer is formed on the substrate and the gate, and followed by an anisotropically blanket etching to etch the dielectric layer to form a spacer on the sidewall of the gate. Finally, source/drain regions with the second conductivity type are formed.
REFERENCES:
patent: 5360749 (1994-11-01), Anjum et al.
patent: 5492847 (1996-02-01), Kao et al.
patent: 5552332 (1996-09-01), Tseng et al.
Hoang Quoc
Nelms David
United Microelectronics Corp.
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