Method for reducing plasma discharge damage during processing

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Plasma

Reexamination Certificate

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C438S197000, C438S514000, C438S712000, C257SE21006, C257SE21043, C257SE21058, C257SE21170, C257SE21115, C257SE21231, C257SE21267, C257SE21329, C257SE21400, C257SE21126, C257SE21135, C257SE21182, C257SE21218, C257SE21224

Reexamination Certificate

active

07951695

ABSTRACT:
A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist (114) which includes resist openings formed (117) over the active circuit areas (13, 14) as well as additional resist openings (119) formed over inactive areas (15) in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings (119) are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures (e.g.,152) for use in manufacturing the final structure.

REFERENCES:
patent: 5271972 (1993-12-01), Kwok et al.
patent: 6072227 (2000-06-01), Yau et al.
patent: 6452284 (2002-09-01), Sheck
patent: 6521302 (2003-02-01), Campana-Schmitt et al.
patent: 6933523 (2005-08-01), Sheck
patent: 2007/0061768 (2007-03-01), Travis et al.
patent: 2007/0134921 (2007-06-01), Tian et al.

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