Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-08-16
2011-08-16
Maldonado, Julio J (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S233000, C438S306000, C438S561000, C438S563000, C257SE21443, C257SE21551, C257SE21556, C257SE21557
Reexamination Certificate
active
07998823
ABSTRACT:
By forming an additional doped region with increased junction depth at areas in which contact regions may connect to drain and source regions, any contact irregularities may be embedded into the additional doped region, thereby reducing the risk for leakage currents or short circuits between the drain and source region and the well region that may be conventionally caused by the contact irregularity. Moreover, additionally or alternatively, the surface topography of the semiconductor region and the adjacent isolation trench may be modified prior to the formation of metal silicide regions and contact plugs to enhance the lithography procedure for forming respective contact openings in an interlayer dielectric material. For this purpose, the isolation trench may be brought to an equal or higher level compared to the adjacent semiconductor region.
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Translation of Official Communication from German Patent Office for German Patent Application No. 10 2005 063 131.2 dated Jun. 16, 2010.
Frohberg Kai
Peters Carsten
Richter Ralf
Advanced Micro Devices , Inc.
Maldonado Julio J
Williams Morgan & Amerson P.C.
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