Method for reducing dielectric overetch using a dielectric...

Details Method for reducing dielectric overetch using a dielectric... Method for reducing dielectric overetch using a dielectric...

2005-03-25

2008-09-09

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S692000, C438S697000, C438S900000

Reexamination Certificate

active

07422985

ABSTRACT:
A substantially planar surface coexposes conductive or semiconductor features and a dielectric etch stop material. In a preferred embodiment, the conductive or semiconductor features are pillars forming vertically oriented diodes. A second dielectric material, different from the dielectric etch stop material, is deposited on the substantially planar surface. A selective etch etches a hole or trench in the second dielectric material, so that the etch stops on the conductive or semiconductor feature and the dielectric etch stop material. In a preferred embodiment the substantially planar surface is formed by filling gaps between the conductive or semiconductor features with a first dielectric such as oxide, recessing the oxide, filling with a second dielectric such as nitride, then planarizing to coexpose the nitride and the conductive or semiconductor features.

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