Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent
1998-09-02
2000-09-05
Moise, Emmanuel L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
764721, 36518911, 365201, 365203, 36523006, G11C 2900, G11C 700
Patent
active
061158348
ABSTRACT:
A method for quickly identifying floating cells by a bit-line coupling pattern (BLCP), an electronic analysis method, identifies floating cells by inputting different background data and inducing net charges from adjacent bit-lines to the bit-lines corresponding to floating cells by coupling parasitic capacitors, wherein the floating results from open bit-line contacts and/or open DRAM cell contacts. Moreover, a method for identifying floating cells according to the invention has the advantages of high efficiency and low cost.
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Chen Chang-Pin
Jen Tean-Sen
Wang Shiou-Yu
Yang Wu-Der
Bednarek Michael D.
Moise Emmanuel L.
Nanya Technology Corporation
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