Method for providing bitwise constraints for test generation

Details Method for providing bitwise constraints for test generation Method for providing bitwise constraints for test generation

2005-07-12

2005-07-12

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S724000, C703S013000

Reexamination Certificate

active

06918076

ABSTRACT:
A method for enabling bitwise or bit slice constraints to be provided as part of the test generation process, by providing a language structure which enables these constraints to be expressed in a test generation language such as e code for example. The language structure for such bitwise constraints is then handled in a more flexible manner, such that the test generation process does not attempt to rigidly “solve” the expression containing the constraint as a function. Therefore, the propagation of constraints in such a structure do not necessarily need to be propagated from left to right, but instead are generated in a multi-directional manner. The language structure is particularly suitable for such operators as “[:]”, “|”, “&”, “^”, “˜”, “>>” and “<<”.

REFERENCES:
patent: 6134512 (2000-10-01), Barrett
patent: 6182258 (2001-01-01), Hollander
patent: 2002/0019975 (2002-02-01), Johnson
patent: 2002/0055807 (2002-05-01), Zimmermann
patent: 02154530 (1990-06-01), None

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