Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-08-16
2005-08-16
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S257000
Reexamination Certificate
active
06930002
ABSTRACT:
A method for programming a single-poly EPROM cell at relatively low operation voltages (±Vcc) is disclosed. According to this invention, the single-poly EPROM cell includes a P-channel floating-gate transistor formed on an N well of a P type substrate, and an N-channel coupling device. The P-channel floating-gate transistor has a P+doped drain, P+doped source, a P channel defined between the P+doped drain and P+doped source, a tunnel oxide layer on the P channel, and a floating doped poly gate disposed on the tunnel oxide layer. The N-channel coupling device includes a floating poly electrode, which is electrically connected to the floating doped poly gate of the P-channel floating-gate transistor, and is capacitively coupled to a control region doped in the P type substrate.
REFERENCES:
patent: 6329240 (2001-12-01), Hsu et al.
patent: 6509606 (2003-01-01), Merrill et al.
patent: 6785165 (2004-08-01), Kawahara et al.
patent: 6808169 (2004-10-01), Hsu et al.
Chen Chien-Hung
Shih Chungchin
Hsu Winston
Nhu David
United Microelectronics Corp.
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