Method for programming and/or testing for correct...

Details Method for programming and/or testing for correct... Method for programming and/or testing for correct...

2007-08-14

2007-08-14

Britt, Cynthia (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10357658

ABSTRACT:
Proposed is a method for programming and/or testing for the correct functioning of an electronic circuit, and a corresponding device, which is used to efficiently program and test electronic circuits combined on a wafer, prior to their separation. For this purpose, a bus allowing the individual electronic circuits to be sequentially tested is positioned on the wafer. Each electronic circuit is assigned an address for the bus, using a hardware code. The address is deactivated after completion of the functionality and testing method.

REFERENCES:
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patent: 5648661 (1997-07-01), Rostoker et al.
patent: 5930269 (1999-07-01), Tsukamoto et al.
patent: 6026038 (2000-02-01), Cho et al.
patent: 6453435 (2002-09-01), Limon et al.
patent: 6784685 (2004-08-01), Chao et al.
patent: 2002/0199142 (2002-12-01), Gefen

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