Method for production of a read-only-memory cell arrangement hav

Details Method for production of a read-only-memory cell arrangement hav Method for production of a read-only-memory cell arrangement hav

1997-04-17

1998-04-28

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438276, 438278, 438206, H01L 218246

Patent

active

057443939

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

Memories in which data are permanently written in digital form are required for many electronic systems. Such memories are called, inter alia, read-only-memories.
For large quantities of data, such as, in particular, the digital storage of music, plastic discs, so-called compact discs which are coated with aluminium, are in widespread use as read-only-memories. These disks have two types of point-like depressions in the coating, which depressions are assigned to the logic values zero and one. The information is stored digitally in the arrangement of these depressions.
In order to read the data which are stored on a compact disc, the disc is mechanically rotated in a read apparatus. The point-like depressions are scanned via a laser diode and a photocell. Typical scanning rates in this case are 2.times.40 kHz. Approximately 4 Gbits of information can be stored on one plastic disc.
The read apparatus has moving parts which wear mechanically, require a comparatively large volume and allow only slow data access. Furthermore, the read apparatus is sensitive to vibration and is thus suitable for mobile systems only to a limited extent.
Read-only-memories on a semiconductor basis, preferably silicon, are in widespread use for the storage of smaller quantities of data. These are generally implemented as a planar integrated silicon circuit in which MOS transistors are used as memory cells. During read-out, the individual memory cells are selected via the gate electrode of the MOS transistors, which is connected to a word line. The input of each MOS transistor is connected to a reference line, and the output is connected to a bit line. During the read process, an assessment is carried out as to whether any current is or is not flowing through the transistor. The logic values zero and one are assigned accordingly.
Technically, the storage of zero and one in the case of these read-only-memories is brought about by no MOS transistor being produced in memory cells in which the logic value assigned to the state "no current flow through the transistor" is stored, or no conductive connection to the bit line being implemented. Alternatively, the two logic values can be implemented by means of MOS transistors which have different operating voltages as a result of different implantations in the channel region.
These known silicon memories generally have a planar construction. In consequence, a minimum area requirement, which is approximately 6 to 8 F.sup.2, is required per memory cell wherein F is the smallest structure size which can be produced in the respective technology. Planar silicon read-only-memories are thus limited to memory densities of about 0.14 bit/.mu.m.sup.2 using one-.mu.m technology.
U.S. Pat. No. 5,021,355 discloses a read-only-memory having vertical MOS transistors. A p-well is produced in an n-doped substrate in order to produce this read-only-memory. An n-doped drain region is produced on the surface of the p-well. Trenches which extend into the p-well are etched for formation of vertical MOS transistors. A source region, which can extend to and abut the n-doped substrate is formed on the base of the trenches by implantation. A channel region is arranged along the flanks of the trench. The surface of the trench is provided with a gate dielectric. The trench is filled with a gate electrode. Adjacent memory cells are insulated from one another by flat insulation regions, which cut through the drain regions and extend into the p-well. Zero and one are distinguished in this arrangement by no trench being etched, and no transistor produced, for one of the logic values.


SUMMARY OF THE INVENTION

The present invention is based on the problem of specifying a method for production of a read-only-memory cell arrangement on a semiconductor basis, by means of which read-only-memory cell arrangements having an increased memory density are achieved and in the case of which a high yield is ensured.
To this end, in an embodiment, the present invention provides a method for production of a

REFERENCES:
patent: 4663644 (1987-05-01), Shimizu
patent: 5021355 (1991-06-01), Dhong et al.
patent: 5362662 (1994-11-01), Ando et al.
patent: 5378649 (1995-01-01), Huang
patent: 5429973 (1995-07-01), Hong

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