Method for producing Si 1-y Ge y based zones with different...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21182, C438S770000, C438S478000, C438S455000

Reexamination Certificate

active

07598145

ABSTRACT:
A method for producing a microelectronic device comprising a plurality of Si1-yGeybased semi-conductor zones (wherein 0<y≦1) that have different respective Germanium contents.

REFERENCES:
patent: 5374564 (1994-12-01), Bruel
patent: 6600170 (2003-07-01), Xiang
patent: 6867128 (2005-03-01), Deleonibus
patent: 6916727 (2005-07-01), Leitz et al.
patent: 2004/0000268 (2004-01-01), Wu et al.
patent: 2004/0178406 (2004-09-01), Chu
patent: 2005/0098234 (2005-05-01), Nakaharai et al.
patent: 2005/0269595 (2005-12-01), Tezuka
patent: 2007/0207598 (2007-09-01), Damlencourt et al.
patent: 04 50889 (2004-05-01), None
patent: WO 2005/109509 (2005-11-01), None
Bera L.K., et al., Dual Strained CMOS Structure Through Simultaneous Formation of Relaxed and Compressive Strained SiGe-on-Insulator, IEEE Electron Device Letters, vol. 27, No. 5, May 5, 2006, pp. 350-353.
Tezuka T., et al., “High-Mobility Strained SiGe-on-Insulator pMOSFETs with Ge-Rich Surface Channels Fabricated by Local Condensation Technique”, IEEE Electron Device Letters, vol. 26, No. 4, Apr. 2005, pp. 243-245.
Tezuka T., et al., “A New Strained SOI/GOI Dual CMOS Technology Based on Local Condensation Technique”, 2005 Symposium on VLSI Technology Digest of Technical Papers, Jun. 2005, pp. 80-81.
Nakaharai S., et al., “Characterization of 7-nm-Thick Strained Ge-on-Insulator Layer Fabricated by Ge-Condensation Technique”, Applied physics letters, vol. 83, No. 17, Oct. 27, 2003, pp. 3516-6951.
Tezuka T., et al., “A Novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100 nm Strained Silicon on Insulator MOSFETs”, Japanese Journal of Applied Physics, vol. 40,2001, pp. 2866-2874.
Tezuka T., et al., “Selectively Formed High Mobility SiGe on Insulator pMOSFETs with Ge-rich Strained Surface Channels Using Local Condensation Technique”, Symposium on VLSI Technology, 2004, pp. 198-199.
J. Huang, et al., “Calculation of Critical Layer Thickness Considering Thermal Strain in Si 1-x Gex/Si Strained Layer Heterostructures”, Journal of Applied Physics, 83 (1), American Institute of Physics, 1998, pp. 171-173.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for producing Si 1-y Ge y based zones with different... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for producing Si 1-y Ge y based zones with different..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing Si 1-y Ge y based zones with different... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4067540

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.