Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2010-08-25
2011-11-08
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21632, C257SE21642
Reexamination Certificate
active
08053305
ABSTRACT:
The invention provides a method for producing a semiconductor device that can reduce the number of mask steps. In a CMOS production process, gate electrodes are formed in regions for forming an NMOS and a PMOS at the same time with a common mask pattern, and after the gate electrodes have been formed, a well, and source and drain regions are formed by impurity ion implantations with a common mask pattern in each region of the NMOS and the PMOS, using the gate electrode as a mask, whereby the number of mask steps is reduced.
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patent: 2009/0209077 (2009-08-01), Lowis
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patent: 2010/0289081 (2010-11-01), Griebenow
patent: 04-025168 (1992-01-01), None
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patent: 2001-168207 (2001-06-01), None
Harness & Dickey & Pierce P.L.C.
Le Thao P.
Sharp Kabushiki Kaisha
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