Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-07-12
1997-06-10
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438210, H01L 21265
Patent
active
056375166
ABSTRACT:
A method for producing complementary MOS and bipolar transistors on the same semiconductor wafer, includes producing buried zones of differing conductivity, producing n- and p-doped wells for corresponding transistors, and producing field oxide regions and insulated gate electrodes of the MOS transistors. After production of the field oxide regions, highly doped n-regions extending from a surface of the semiconductor wafer to a buried n-doped zone are produced with a first mask for producing a collector zone of an npn transistor and a base zone of a pnp transistor. After the production of the insulated gate electrodes, a first silicon layer is applied over the entire surface and doped with p-atoms. An auxiliary layer is applied on the first silicon layer over the entire surface. The auxiliary layer and the first silicon layer are structured with a second mask. A base contact zone of the npn transistor, source and drain zones of a p-MOS transistor, and a collector zone and an emitter zone of the pnp transistor are simultaneously produced, by diffusion out from the structured first silicon layer. The first silicon layer is laterally insulated, and a second silicon layer is produced, doped with n-atoms, and structured with a mask. An emitter zone and a collector terminal zone of the npn transistor, a base terminal of the pnp transistor, and source and drain zones of an n-MOS transistor are simultaneously produced by diffusion out from the structured second silicon layer.
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Greenberg Laurence A.
Lerner Herbert L.
Nguyen Tuan H.
Siemens Aktiengesellschaft
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