Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-04-30
2002-08-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S299000, C438S302000, C438S682000
Reexamination Certificate
active
06440806
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention generally relates to methods for producing metal-semiconductor compound regions on semiconductor devices.
2. Description of the Related Art
The semiconductor industry is increasingly characterized by a growing trend toward fabricating larger and more complex circuits on a given semiconductor chip. This is being achieved by reducing the size of individual devices within the circuits and spacing the devices closer together. The reduction of the size of individual devices and the closer spacing brings about improved electrical performance.
There is increasing interest in metal-oxide-semiconductor (MOS) integrated circuits in which the component devices have gate dimensions as small as 0.35 &mgr;m or less. Devices having such small dimensions suffer from certain problems that are not of serious concern when the gate dimensions are greater than about 1 &mgr;m.
Two of the major goals of metal-oxide-semiconductor field effect transistor (MOSFET) scaling are to increase the density and the speed of the integrated circuits in which the scaled-down devices are to be used. To increase density, the physical dimensions of each integrated circuit have to be reduced which means smaller channel lengths and widths. As the physical dimensions of the integrated circuit reaches the submicron regime, all of the device parameters that affect performance of the integrated circuit become important.
One of the parameters that has become critical is the contact technology used in coupling transistors to make interconnections between transistors and other components of integrated circuits. As size of individual components is decreased, it becomes increasingly difficult to fabricate contacts with desirable characteristics, such as low resistance and impedance.
SUMMARY OF THE INVENTION
A method of making metal-semiconductor compound regions, such as silicide regions, includes forming a metal layer on a surface of a semiconductor device, performing a first annealing to form metal-semiconductor regions, and depositing additional metal within and/or underneath the metal-semiconductor regions. The depositing may be accomplished by ion implantation. Following the depositing, a second annealing is performed to recrystallize the metal-semiconductor compounds and/or to increase the size of the metalsemiconductor compound regions.
According to an aspect of the invention, a method of forming metal-semiconductor compounds includes depositing metallic ions beneath a surface of semiconductor material.
According to another aspect of the invention, a method of forming metal-semiconductor compounds includes depositing metallic ions in a semiconductor material after between a pair of annealing steps used to form metal-semiconductor compound material.
According to a yet another aspect of the invention, a method of forming metal-semiconductor compounds includes depositing metallic ions at least partially within a metal-semiconductor compound region, followed by annealing.
According to still another aspect of the invention, a method of making metal-semiconductor compound regions in a semiconductor device includes the steps of: depositing a metal layer on source and drain regions of a transistor; annealing the device to form respective source and drain metal-semiconductor compound regions in the source region and the drain region; removing unreacted metal of the metal layer; and implanting metal ions in the source region and the drain region.
According to a further aspect of the invention, a method of making silicide regions in a semiconductor device includes the steps of: depositing a metal layer on source and drain regions of a transistor; performing a first annealing of the device to form respective source and drain metal-semiconductor compound regions in the source region and the drain region; removing unreacted metal of the metal layer; depositing additional metal in the source and drain regions; and performing a second annealing of the device.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Advanced Micro Devices , Inc.
Le Thao
Renner , Otto, Boisselle & Sklar, LLP
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