Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2005-12-13
2005-12-13
Tugbang, A. Dexter (Department: 3762)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S832000, C029S834000, C029S836000, C228S180210, C228S180220
Reexamination Certificate
active
06973717
ABSTRACT:
A semiconductor device in chip format having a chip which has at least one first insulating layer and electrical connection pads free of the insulating layer is described. On the first insulating layer, interconnects run from the electrical connection pads to base regions of external connection elements. A further applied insulating layer is provided with openings leading from the outside to the base regions of the external connection elements. In the openings there is a conductive adhesive, onto which small balls which are metallic at least on the outside are placed. The semiconductor element can also contain a solder paste instead of a conductive adhesive in the openings, and metallized small plastic balls are placed onto the solder paste. The invention furthermore relates to methods for producing the semiconductor device described.
REFERENCES:
patent: 4922321 (1990-05-01), Arai et al.
patent: 5074947 (1991-12-01), Estes et al.
patent: 5147210 (1992-09-01), Patterson et al.
patent: 5340775 (1994-08-01), Carruthers et al.
patent: 5477087 (1995-12-01), Kawakita et al.
patent: 5663086 (1997-09-01), Rostoker et al.
patent: 5672542 (1997-09-01), Schwiebert et al.
patent: 5677566 (1997-10-01), King et al.
patent: 5834844 (1998-11-01), Akagawa et al.
patent: 5929522 (1999-07-01), Weber
patent: 6016013 (2000-01-01), Baba
patent: 6107109 (2000-08-01), Akram et al.
patent: 6114240 (2000-09-01), Akram et al.
patent: 6180504 (2001-01-01), Farnworth et al.
patent: 6262513 (2001-07-01), Furukawa et al.
patent: 6297559 (2001-10-01), Call et al.
patent: 6369600 (2002-04-01), Farnworth et al.
patent: 0 734 059 (1996-09-01), None
patent: 61 177 746 (1986-08-01), None
patent: 05 062 981 (1993-03-01), None
patent: 06 232 134 (1994-08-01), None
patent: WO 96/22620 (1996-07-01), None
Shinji Baba et al.: “Molded Chip Scale package for High Pin Count”, 1996 Electronic Components and Technology Conference, pp. 1251-1257, XP-000684987.
“Solder Plated Resin Ball”, IBM Technical Disclosure Bulletin, pp. 463-464.
John R. Morris et al.: “Stencil Printing of Solder Paste for Fine-Pitch Surface Mount Assembly”,IEEE Transactions on Components, Hybrids, and Manufacturing Technology, vol. 14, Sep. 1991, No. 3, pp. 560-566.
P. Van Zant: “Microchip Fabrication” Chapter7,McCraw Hill, New York, 1998, pp. 139-146, 598-99.
Galuschki Klaus-Peter
Hacke Hans-Jürgen
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Smith Terri Lynn
Stemer Werner H.
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