Method for producing a MOS transistor and MOS transistor

Details Method for producing a MOS transistor and MOS transistor Method for producing a MOS transistor and MOS transistor

2005-04-26

2005-04-26

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S289000, C438S290000

Reexamination Certificate

active

06884688

ABSTRACT:
A MOS transistor includes a drain zone, a source zone, and a gate electrode. Doping atoms of the first conductivity type are implanted in the region of the drain zone and the source zone by at least two further implantation steps such that a pn junction between the drain zone and a substrate region is vertically shifted and a voltage ratio of the MOS transistor between a lateral breakdown voltage and a vertical breakdown voltage can be set.

REFERENCES:
patent: 5719424 (1998-02-01), Ahmad et al.
patent: 6017798 (2000-01-01), Ilderem et al.
patent: 6074906 (2000-06-01), Cheek et al.
patent: 6096616 (2000-08-01), Nistler et al.
patent: 6211023 (2001-04-01), Yeh et al.
patent: 6238960 (2001-05-01), Maszara et al.
patent: 6297114 (2001-10-01), Iwata et al.
patent: 6383883 (2002-05-01), Cheng et al.
patent: 6391733 (2002-05-01), Fisher
patent: 6528376 (2003-03-01), Guo
patent: 42 00 884 (1992-07-01), None
patent: 195 43 389 (1997-03-01), None
patent: 199 44 488 (2001-04-01), None
Warren R. Anderson et al., ESD Protection for Mixed-Voltage I/O Using NMOS Transistors Stacked in a Cascode Configuration, Proceedings of the EOS/ESD Symposium 1998, pp. 54-63.*
Warren R. Anderson et al.: “ESD protection for Mixed-Voltage I/O Using NMOS Transistors Stacked in a Cascade Configuration”,Proceedings of the EOS/ESD Symposium 1998, pp. 54-63.

Affiliated with

Also associated with

Rating

Method for producing a MOS transistor and MOS transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for producing a MOS transistor and MOS transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing a MOS transistor and MOS transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3378964