Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-29
2005-03-29
Thompson, Craig A. (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06872610
ABSTRACT:
Methods are presented, in which an oxide protection layer is provided on a gate structure for protection against poly mushrooming during selective epitaxial silicon deposition in fabricating elevated or recessed source transistors. In one implementation, the protection layer is constructed by depositing silicon germanium over a gate polysilicon layer prior to gate patterning, and oxidizing the device to form a silicon germanium oxide over the gate polysilicon. The protection layer is then removed following selective epitaxial deposition.
REFERENCES:
patent: 6200867 (2001-03-01), Chen
patent: 6313505 (2001-11-01), Yu
patent: 6594293 (2003-07-01), Bulsara et al.
patent: 20020182815 (2002-12-01), Hu et al.
patent: 20030025163 (2003-02-01), Kwon
Mansoori Majid M.
Wu Zhigiang
Brady III Wade James
Harrison Monica D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Thompson Craig A.
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