Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-06-30
1999-11-02
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438437, 438427, 148DIG50, H01L 2176
Patent
active
059769513
ABSTRACT:
A method for forming an isolating trench in a substrate is disclosed herein. The forgoing method includes the following steps. First, form a first dielectric layer and a second dielectric layer on the substrate subsequently, and then develop a photoresist pattern on the second dielectric layer. Then, etch the substrate, the first dielectric layer and the second dielectric layer to form a trench in the substrate. Next, form a first silicon dioxide layer in the trench followed by removing the photoresist pattern. The next step is to form a third dielectric layer on the second dielectric layer and the first silicon dioxide layer. Subsequently, fill the trench with silicon dioxide to from an oxide trench; then remove the second dielectric layer, a first portion of the third dielectric layer and a portion of the oxide trench with a chemical mechanical polishing (CMP) and a first solution. The third dielectric layer mentioned above includes the first portion of the third dielectric layer and a second portion of the third dielectric layer. Finally, etch the first dielectric layer and the oxide trench to expose the substrate. The second portion of the third dielectric layer is used to prevent an oxide loss in the oxide trench; then the isolating trench being formed thereof.
REFERENCES:
patent: 4952524 (1990-08-01), Lee et al.
patent: 5387540 (1995-02-01), Poon et al.
patent: 5492858 (1996-02-01), Bose et al.
patent: 5763315 (1998-06-01), Benedict et al.
Chen Chao-Yen
Hsiao Chih-Hsiang
Huang Kuo-Tai
Dang Trung
United Microelectronics Corp.
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