Method for preventing dopant diffusion in dual gate device

Details Method for preventing dopant diffusion in dual gate device Method for preventing dopant diffusion in dual gate device

1998-12-04

2000-05-09

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438199, 438592, 438653, 438655, H01L 21336, H01L 218238

Patent

active

060603615

ABSTRACT:
A method for preventing the diffusion of dopants in a dual gate device includes the steps of providing a semiconductor substrate having wells and isolating structures thereon, and then forming a gate oxide layer over the well regions. Thereafter a polysilicon layer is formed over the gate oxide layer, and then a first conductive layer is formed over the polysilicon layer. Subsequently, a plasma treatment using gaseous nitrogen or gaseous ammonia is conducted to form a barrier layer. Finally, a second conductive layer is formed over the barrier layer.

REFERENCES:
patent: 5093710 (1992-03-01), Higuchi
patent: 5232871 (1993-08-01), Ho
patent: 5733816 (1998-03-01), Iyer et al.
patent: 5780356 (1998-07-01), Kim
patent: 5780908 (1998-07-01), Sekiguchi et al.
patent: 5817175 (1998-10-01), Iyer
patent: 5856237 (1999-01-01), Ku

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