Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent
1996-08-01
1998-05-05
Dutton, Brian
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
438977, G01R 3126, H01L 2166
Patent
active
057473650
ABSTRACT:
An improved method for grinding a semiconductor chip to prepare it for scanning with SEM to view a defect includes the step of forming an electrically conductive coating on the top surface of the chip. The coating is made under a mask that produces a U shaped conductive pattern so that an electrical path is formed on the top surface of the chip between two corners of the pattern. An initial resistance measurement is made for this path and a known amount of the chip below the U shape is ground away and a second resistance measurement is made. From these measurements, a calculation is made that gives the resistance when the chip has been ground to a selected section line. The grinding operation then proceeds until this resistance is reached, and the usual practice of visually checking the chip during the grinding operation is avoided. The mask creates a point at the bottom of the U shape that points to the defect.
REFERENCES:
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patent: 4473795 (1984-09-01), Wood
patent: 4878315 (1989-11-01), Dawson et al.
patent: 5159752 (1992-11-01), Mahant-Shetti et al.
Horng Shean-Ren
Huang Fei-Chi
Wang Wonder D.
Ackerman Stephen B.
Dutton Brian
Robertson William
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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