Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-06
1999-08-24
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438381, 438382, H01L 218244
Patent
active
059435674
ABSTRACT:
A method for fabricating a load device on an SRAM is provided which substantially increases the effective length of its load device without increasing the cell size. This method includes the steps of: (1) depositing an interpoly dielectric layer on a wafer surface; (2) depositing a first oxide layer on the interpoly dielectric layer; (3) using a photography technique to form at least one first oxide stripe from the interpoly dielectric layer in a direction perpendicular to the direction of the polysilicon load; (4) depositing a second oxide layer on and around the first oxide stripe, then etching back the second oxide layer to form a second oxide spacer on the sidewalls of the first oxide stripe; (5) using a selective etching technique to etch the first oxide stripe, leaving the second oxide spacer on the wafer surface; (6) using a photolithography technique and masked dopant-implantation to form a polysilicon layer on the surface, the polysilicon layer contains a highly doped connector region and an undoped or lightly doped load region. The load region is formed in a direction perpendicular to the second oxide stripe and conformed to the profile of the second oxide stripe so as to assume a three-dimensional heaved structure on top thereof and provide an enhanced effective length.
REFERENCES:
patent: 5705418 (1998-01-01), Liu
patent: 5721166 (1998-02-01), Huang et al.
Liauh W. Wayne
Tsai Jey
Winbond Electronics Corp
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