Method for patterning micro features by using developable...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000, C438S508000, C438S508000

Reexamination Certificate

active

07341939

ABSTRACT:
In the manufacture of a semiconductor, a DBARC layer is deposited upon a wafer to prevent reflection. A photo resist layer is deposited upon the DBARC layer and the wafer is selectively exposed to irradiation. The irradiation generates photo acid (H+ ions) in the exposed areas of the photo resist and DBARC. In order to provide better resolution in the DBARC for micro-features, an electric field is generated vertically through the coated wafer before or during post exposure baking (PEB) to create a uniform vertical distribution of H+ ions though the DBARC. The coated wafer is then developed to remove either the unexposed portions, or exposed portion of the DBARC. The cavities formed by the developer have side walls that are substantially vertical as a result of the uniform vertical distribution of the H+ ions.

REFERENCES:
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patent: 5258266 (1993-11-01), Tokui et al.
patent: 5429910 (1995-07-01), Hanawa
patent: 6242164 (2001-06-01), Choi et al.
patent: 6869737 (2005-03-01), Suzuki et al.
Liu He et al., Bottom Anti-Reflective Coatings (BARCs) for 157-nm Lithography, Copyright 2003 Society of Photo-Optical Instrumentation Engineers, pp. 1-10.

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