Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-03-28
2010-11-23
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S938000, C438S958000, C438S970000
Reexamination Certificate
active
07838354
ABSTRACT:
By performing a planarization process, for instance based on a planarization layer, prior to forming a resist mask for selectively removing a portion of a stressed contact etch stop layer, the strain-inducing mechanism of a subsequently deposited further contact etch stop layer may be significantly improved.
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Translation of Official Communication from German Patent Office for German Patent Application No. 10 2006 041 006.8-33 dated Mar. 15, 2010.
Frohberg Kai
Mueller Sven
Schwan Christoph
Advanced Micro Devices , Inc.
Novacek Christy L
Williams Morgan & Amerson P.C.
Zarabian Amir
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