Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-05-06
2008-05-06
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07370313
ABSTRACT:
The invention relates to a method for optimizing a mask layout pattern comprising at least one structural feature. First a desired layout pattern is provided. Based on the desired layout pattern, an optimized reference diffraction coefficient is provided. After selecting an initial mask geometry having polygon-shaped structures, initial diffraction coefficients are calculated. A difference based on the reference diffraction coefficient and initial diffraction coefficients is used to optimize the initial geometry in order to provide a mask layout pattern.
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Koehle Roderick
Kuechler Bernd
Noelscher Christoph
Infineon - Technologies AG
Lin Sun James
Slater & Matsil L.L.P.
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