Method for minimizing slip line faults on a semiconductor...

Details Method for minimizing slip line faults on a semiconductor... Method for minimizing slip line faults on a semiconductor...

2006-11-21

2006-11-21

Pham, Hoai (Department: 2814)

Semiconductor device manufacturing: process

Radiation or energy treatment modifying properties of...

By differential heating

C438S530000, C438S715000

Reexamination Certificate

active

07138344

ABSTRACT:
A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.

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patent: 07321120 (1995-12-01), None

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