Method for metal alignment mark generation

Details Method for metal alignment mark generation Method for metal alignment mark generation

1996-05-20

1999-05-18

Dote, Janis L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438401, 438975, 430 22, H01L23/544;21/64

Patent

active

059045639

ABSTRACT:
The contact hole via mask used in the manufacture of semiconductor integrated circuits is modified to produce a multiplicity of lines and spaces adjacent to the edge of an alignment mark in the via hole pattern. This line-space pattern is etched simultaneously with the contact via holes, and allows the regeneration of the alignment mark after tungsten deposition and planarization of the surface by conventional oxide etching and metallization steps.

REFERENCES:
patent: 5244534 (1993-09-01), Yu et al.
patent: 5270255 (1993-12-01), Wong
patent: 5332467 (1994-07-01), Sune et al.
patent: 5482893 (1996-01-01), Okabe et al.
patent: 5503962 (1996-04-01), Caldwell

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